DSP接口電路設(shè)計(jì)與編程

第1章DSP的結(jié)構(gòu)和功能                  
 1.1  ADI公司DSP的特點(diǎn)  1                  
 1.2  SHARC系列DSP的分類(lèi)  1                  
 1.3  ADSP 2106x并行浮點(diǎn)DSP處理器結(jié)構(gòu)和功能  3                  
 1.3.1  運(yùn)算單元  4                  
 1.3.2  控制單元  5                  
 1.3.3  地址產(chǎn)生器和總線  6                  
 1.3.4  中斷  6                  
 1.3.5  寄存器組成  6                  
 1.3.6  存儲(chǔ)器  7                  
 1.3.7  DMA  10                  
 1.3.8  鏈路口和串口  10                  
 1.4  ADSP 2106x的硬件接口設(shè)計(jì)  10                  
 1.5  思考題  12                  
 第2章 DSP與存儲(chǔ)器接口                  
 2.1  存儲(chǔ)器種類(lèi)  13                  
 2.2  等待模式  14                  
 2.2.1  軟等待訪問(wèn)模式  15                  
 2.2.2  硬等待訪問(wèn)模式  16                  
 2.2.3  軟等待和硬等待  16                  
 2.3  譯碼和片選  18                  
 2.4  DSP與SRAM接口  19                  
 2.5  DSP與EPROM接口  22                  
 2.5.1  DSP的EPROM引導(dǎo)流程  22                  
 2.5.2  DSP訪問(wèn)引導(dǎo)EPROM的方法  24                  
 2.6  DSP與Flash接口  24                  
 2.6.1  用8位Flash作引導(dǎo)存儲(chǔ)器  25                  
 2.6.2  用48位Flash作程序存儲(chǔ)器  32                  
 2.6.3  用大容量Flash  35                  
 2.7  DSP與多端口存儲(chǔ)器接口  39                  
 2.7.1  DSP與FIFO的接口  39                  
 2.7.2  DSP與雙口RAM的接口  41                  
 2.8  DSP與SDRAM接口  42                  
 2.9  DSP與同步突發(fā)SRAM（SBSRAM）的接口  48                  
 2.10  思考題  51                  
 第3章DMA應(yīng)用                  
 3.1  總線DMA  52                  
 3.1.1  主機(jī)方式  53                  
 3.1.2  握手方式和其他方式  55                  
 3.1.3  鏈?zhǔn)紻MA  59                  
 3.1.4  共享總線下的DMA  61                  
 3.2  鏈路DMA  63                  
 3.3  二維DMA  65                  
 3.4  串口DMA  66                  
 3.5  思考題  67                  
 第4章A/D和D/A電路設(shè)計(jì)                  
 4.1  A/D和D/A轉(zhuǎn)換器  68                  
 4.1.1  采樣速度  68                  
 4.1.2  量化位數(shù)  70                  
 4.1.3  量化位數(shù)和采樣速度的轉(zhuǎn)換  70                  
 4.1.4  其他因素  71                  
 4.2  總線與A/D接口  72                  
 4.3  串口與串行A/D相連  76                  
 4.4  DSP與D/A接口  78                  
 4.5  思考題  79                  
 第5章 擴(kuò)展的DSP接口                  
 5.1  擴(kuò)展的異步串口  80                  
 5.1.1  8251接口  81                  
 5.1.2  16650接口  85                  
 5.2  數(shù)據(jù)/地址總線復(fù)用接口  95                  
 5.2.1  DSP與時(shí)鐘芯片的接口  95                  
 5.2.2  DSP與CAN總線的接口  98                  
 5.3  擴(kuò)展DSP的I/O和中斷  99                  
 5.4  DSP主機(jī)與CPCI/PCI總線的連接  100                  
 5.4.1  WB]基于CPCI總線的DSP緊耦合系統(tǒng)  101                  
 5.4.2  橋接芯片PCI 9054  108                  
 5.4.3  DSP的主機(jī)接口  116                  
 5.4.4  PCI總線  120                  
 5.4.5  Compact PCI  125                  
 5.5  思考題  129                  
 第6章 電路設(shè)計(jì)                  
 6.1  電源設(shè)計(jì)  130                  
 6.1.1  DC/DC變換  130                  
 6.1.2  多電源工作  132                  
 6.1.3  電源和地的去耦  133                  
 6.2  時(shí)鐘電路與復(fù)位電路  133                  
 6.3  驅(qū)動(dòng)與隔離  134                  
 6.4  電平轉(zhuǎn)換器  136                  
 6.5  DSP的仿真接口  138                  
 6.6  DSP與FPGA的結(jié)合  139                  
 6.7  測(cè)試和自檢功能  140                  
 6.7.1  信號(hào)測(cè)試  140                  
 6.7.2  電路的自檢功能  141                  
 6.8  DSP的電路板設(shè)計(jì)  142                  
 6.8.1  信號(hào)完整性  142                  
 6.8.2  電磁兼容性設(shè)計(jì)  145                  
 6.8.3  高速模數(shù)混合系統(tǒng)的接地  148                  
 6.8.4  印制電路板的層分布  152                  
 6.8.5  DSP電路設(shè)計(jì)要點(diǎn)  156                  
 6.9  系統(tǒng)設(shè)計(jì)的考慮  161                  
 6.9.1  系統(tǒng)結(jié)構(gòu)  161                  
 6.9.2  調(diào)試和加載  162                  
 6.9.3  功耗和散熱  163                  
 6.10  DSP的程序保護(hù)  163                  
 6.11  抗干擾設(shè)計(jì)  165                  
 6.11.1  看門(mén)狗方法  165                  
 6.11.2  軟件代碼設(shè)計(jì)  167                  
 6.12   電路初調(diào)  169                  
 6.13  思考題  171                  
 第7章DSP的軟件開(kāi)發(fā)                  
 7.1  DSP的軟件開(kāi)發(fā)流程  172                  
 7.2  開(kāi)發(fā)工具VisualDSP++概述  173                  
 7.3  集成開(kāi)發(fā)環(huán)境  174                  
 7.3.1  創(chuàng)建一個(gè)新的工程文件  175                  
 7.3.2  設(shè)置工程選項(xiàng)  175                  
 7.3.3  添加或編輯工程源文件  181                  
 7.3.4  生成一個(gè)調(diào)試版的工程  182                  
 7.3.5  調(diào)試一個(gè)工程  183                  
 7.3.6  一個(gè)正式版的工程  183                  
 7.4  選擇合適的調(diào)試平臺(tái)   183                  
 7.4.1  安裝仿真器驅(qū)動(dòng)軟件  183                  
 7.4.2  選擇調(diào)試平臺(tái)  186                  
 7.4.3  多處理器調(diào)試  189                  
 7.5  程序調(diào)試操作  191                  
 7.6  程序性能分析操作  191                  
 7.6.1  Trace操作  192                  
 7.6.2  Profile操作  192                  
 7.6.3  Statisca Profiling操作  193                  
 7.7  設(shè)置觀察點(diǎn)和斷點(diǎn)  193                  
 7.8  模仿硬件環(huán)境  194                  
 7.9  寄存器窗口操作  195                  
 7.10  存儲(chǔ)器窗口操作  195                  
 7.11  其他窗口操作  197                  
 7.12  編寫(xiě)鏈接描述文件  198                  
 7.13  編程練習(xí)  202                  
 7.13.1  DFT匯編例子  202                  
 7.13.2  C代碼例子  203                  
 7.13.3  C和匯編代碼  207                  
 7.13.4  數(shù)據(jù)繪圖（Plotting）  210                  
 7.13.5  統(tǒng)計(jì)評(píng)估  212                  
 7.14  編程分析  214                  
 7.14.1  離散傅里葉變換（DFT）  214                  
 7.14.2  FIR有限沖激響應(yīng)濾波器  217                  
 7.14.3  矩陣相加  218                  
 7.15  編程舉例  220                  
 7.15.1  編程方法  220                  
 7.15.2  中斷的用法  225                  
 7.15.3  算法子程序  226                  
 7.16  數(shù)據(jù)格式  234                  
 7.17  與早期編程方法的區(qū)別  236                  
 7.18  ADSP 2106x指令集  238                  
 7.18.1  指令總表  239                  
 7.18.2  指令簡(jiǎn)述  242                  
 7.18.3  條件碼  245                  
 7.18.4  ALU運(yùn)算  247                  
 7.18.5  移位器操作  250                  
 7.18.6  乘法器操作  252                  
 7.18.7  多運(yùn)算指令   255                  
 7.19  思考題  256                  
 第8章ADSP 2116x系列DSP的應(yīng)用                  
 8.1   ADSP 21160與早期SHARC DSP的區(qū)別  258                  
 8.1.1  總體功能上的區(qū)別  258                  
 8.1.2  第二套運(yùn)算核(PEy)   260                  
 8.1.3  兩套運(yùn)算部件  261                  
 8.1.4  單指令多數(shù)據(jù)（SIMD）  261                  
 8.1.5  循環(huán)緩沖模式  264                  
 8.1.6  寄存器的廣播式加載模式  265                  
 8.1.7  內(nèi)部存儲(chǔ)器長(zhǎng)字（64位）訪問(wèn)  265                  
 8.1.8  程序的引導(dǎo)  266                  
 8.1.9  標(biāo)志數(shù)值寄存器（FLAGS）  267                  
 8.1.10  同步突發(fā)模式  268                  
 8.2  ADSP 21161與其他SHARC的區(qū)別  268                  
 8.2.1  ADSP 21161的鏈路接口  269                  
 8.2.2  ADSP 21161的串行外設(shè)接口SPI  269                  
 8.3  雙電壓?jiǎn)?dòng)流程  274                  
 8.4  ADSP 2116X的PCB板布線  275                  
 8.5  思考題  276                  
 參考文獻(xiàn)  277